Scientific Analog Digital-Analog Hybrid Analysis Software
Scientific Analog Digital-Analog Hybrid Analysis Software
Software for large-scale and ultra-large-scale digital-analog hybrid circuit design
ABOUT software
Scientific Analog software is a software used in the design of large-scale and super-large-scale digital-analog hybrid circuits. Using Scientific Analog can quickly complete the modeling of analog circuits and the system simulation of digital-analog hybrid circuits, making analog circuit design as convenient as digital circuits Fast, can greatly improve design efficiency and accuracy.
Scientific Analog software can help customers complete the Top-down or Bottom-Up design process. Engineers can easily complete the modeling of analog circuits without writing code, reducing the difficulty of analog circuit design, and saving customers labor and cycle costs.
The main function
XMODEL
XMODEL is a simulation modeling and simulation used in Verilog.
XMODEL provides a very rich and parameterized primitive library, including function-level primitives and circuit-level primitives. Therefore, engineers do not need to program at all, just like building blocks, combining primitives to form a model and test platform. In addition, customers can also use the primitive library to create their own device model library.
The built-in primitives of XMODEL can be used to complete the model construction quickly and efficiently, and the simulation can be completed in SystermVerilog using an event-driven simulator. The calculation speed is 10-100 times faster than Verilog-AMS or Real-Number Verilog
GLISTER
GLISTER—Integrated with Virtuoso and applied to circuit models in Schematics.
GLISTER is fully integrated with the Cadence Virtuoso design environment, which is to completely interface and graphical XMODEL and MODELZEN, and use Schematic graphic symbols to represent XMODEL primitives. In this way, customers no longer need to write code with GLISTER, they only need to combine these graphics to generate a model, and then XMODEL simulation can be performed directly after the model is generated.
When there are both circuit primitives and other spcie models in the hierarchy, XMODEL-SPICE co-simulation is required. GLISTER can assist XMODEL in co-simulation:
GLISTER
GLISTER—Integrated with Virtuoso and applied to circuit models in Schematics.
GLISTER is fully integrated with the Cadence Virtuoso design environment, which is to completely interface and graphical XMODEL and MODELZEN, and use Schematic graphic symbols to represent XMODEL primitives. In this way, customers no longer need to write code with GLISTER, they only need to combine these graphics to generate a model, and then XMODEL simulation can be performed directly after the model is generated.
When there are both circuit primitives and other spcie models in the hierarchy, XMODEL-SPICE co-simulation is required. GLISTER can assist XMODEL in co-simulation:
1.GLISTER可以提供必需的SystemVerilog模型文件、SPICE/Spectre网表和混合信号仿真控制文件；
2.通过cadence Hierarchy editor可以选取cell或instance；
3.GLISTER Testbench测试台为Synopsys的VCS和XA和Cadence的NCVerilog和APS等仿真器提供统一的接口
MODELZEN
The main function of MODELZEN is to automatically extract and generate simulation models from the circuit. MODELZEN takes advantage of XMODEL’s rich circuit primitives to convert any circuit into an equivalent SystemVerilog model.
